Abit NV8 User Manual download pdf (Page 36)

3-10 Chapter 3

! DRAM Clock:

This item sets the DRAM clock of your DRAM module. The system may be unstable or unable to boot up

if your DRAM module does not support the clock you set.

When set to [By SPD], the BIOS will read the DRAM module SPD data and automatically set the DRAM

clock by the value stored in it.

! CAS Latency Time:

You can select SDRAM CAS (Column Address Strobe) latency time according your SDRAM

specification.

! Row Cycle Time:

This item specifies the RAS# active to RAS# active time or auto refresh time of the same bank.

! Row Refresh Cycle Time:

This item specifies the auto refresh active to RAS# active time or RAS# auto refresh time.

! Min. RAS# Active Time:

This item specifies the minimum RAS# active time.

! RAS# to CAS# Delay:

This item specifies the RAS# active to CAS# read write delay time to the same bank.

! RAS# Precharge Time:

This item specifies the RAS# precharge time.

! RAS# to RAS# Delay:

This item specifies the RAS# active to RAS# active delay time of different bank.

! Write Recovery Time:

This item specifies the time measured from the last write datum is safely registered by the DRAM.

! Write to Read Delay:

This item specifies the time measured from the rising edge following the last non-masked data strobe to

the rising edge of the next read command.

! Read to Write Delay:

This item specifies the read to write delay.

! DRAM Command Rate:

When the host (northbridge) locates the desired memory address, it then processes the wait state of

commands.

! Bank Interleaving:

Depending on your SDRAM module structure, the 4-Way setting can offer the best performance. If you

choose the wrong setting, the computer system will not run in a stable manner. For detailed information

on your SDRAM module, please ask your SDRAM module manufacturer.

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Abit NV8 User Manual Page 36