Abit TX5 User Manual Page 11

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11
COMMERCIAL TEMPERATURE RANGE
IDT7290820 5V TIME SLOT INTERCHANGE
DIGITAL SWITCH 2,048 x 2,048
TABLE 6 CONTROL REGISTER (CR) BITS
TABLE 7 VALID ADDRESS LINES FOR DIFFERENT BIT RATES
TABLE 5 OUTPUT HIGH IMPEDANCE CONTROL
OE bit in Connection ODE pin OSB bit in IMS TX Output Driver
Memory Register Status
0 Don’t Care Don’t Care Per Channel
High-Impedance
1 0 0 High-Impedance
1 0 1 Enable
1 1 1 Enable
1 1 0 Enable
Read/Write Address: 00H,
Reset Value: 0000H.
1514131211109876543210
0000000000MBPMSSTA3 STA2 STA1 STA0
Bit Name Description
15-6 Unused Must be zero for normal operation.
5 MBP When 1, the connection memory block programming feature is ready for the programming of Connection
(Memory Block Program) Memory high bits, bit 11 to bit 15. When 0, this feature is disabled.
4 MS When 0, connection memory is selected for read or write operations. When 1, the data memory is selected
(Memory Select) for read operations and connection memory is selected for write operations.
(No microprocessor write operation is allowed for the data memory).
3-0 STA3-0 The binary value expressed by these bits refers to the input or output data stream, which corresponds
(Stream Address Bits) to the subsection of memory made accessible for subsequent operations. (STA3 = MSB, STA0 = LSB)
Input/Output Valid Address Lines
Data Rate
2.048 Mb/s A4, A3, A2, A1, A0
4.096 Mb/s A5, A4, A3, A2, A1, A0
8.192 Mb/s A6, A5, A4, A3, A2, A1, A0
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